General Summary:
Qualcomm modem team is looking for world-class RTL design engineers looking to work on cutting edge wireless technology, which will be deployed worldwide in our industry leading devices.
You will be contributing to RTL design and integration of one or more flagship Modem core IPs. Responsibilities include:
Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.
RTL ownership. Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
Working collaboratively with block designers, verification, architecture, implementation, and post-silicon teams to resolve issues and ensure timely project execution.
Collaborating with cross-functional teams, debugging and identifying issues, providing workarounds, and making recommendations on bug fixes.
Skillset required
The candidate must have at least 1 to 4 years of front-end ASIC RTL design experience. The candidate must be strong in design micro-architecture and RTL coding (SystemVerilog / Verilog / VHDL). Other requirements include:
Hands-on experience with multi-clock designs.
Exposure to synthesis and STA.
Awareness of low power and high-speed design.
Knowledge of industry-standard front-end tool flows (lint, CDC, etc.).
Strong critical thinking, problem-solving, and debugging skills.
Good communication and interpersonal skills. Flexible to work with multi-geo teams.
Minimum Qualifications:
Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 1-5 years of hardware engineering or related work experience, OR
Master’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 1-4 years of hardware engineering or related work experience.
Minimum Qualifications:
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