Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics in order to deliver better products in the increasingly complex world of chip, board and system design push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design.
The Design for Test Consultant will be responsible for supporting the use of Tessent DFT software in the design of complex Application Specific Integrated Circuit (ASIC) designs. As a Design for Test Consultant, you will be part of a team contributing to implementing and verifying DFT features within our Enterprise Customer’s (ASIC) products, as well as enabling them to utilize our advanced methodologies around our Tessent tool suite.
Expectation is to be proficient in the following:
Delivering consulting services covering a broad range of DFT activities.
Working with customers to implement and deploy DFT flows centered around Tessent tool.
Enabling customer adoption of the full capability of Tessent software and methodologies.
Effectively communicating how Siemens Digital Industries Software products and service offerings address customers’ technical objectives.
Articulating customer’s technical requirements and influencing product engineering to shape product direction.
Building and maintaining ongoing positive relationships with customers
Working collaboratively with team members to ensure mutual success
Delivering Tessent-based solutions to address our customer’s technical and business needs
Occasional travel world-wide to customer sites, primarily within Europe
B.Tech / M.Tech
10+ years of ASIC Design for Test experience
Interested in applying engineering skills in a creative way to solve unique customer challenges
Existing Design for Test experience is required including the following:
IJTAG
Boundary Scan
Scan, ATPG
Embedded Compression
Strong understanding of the overall ASIC design
Experience in design flow automation in the Tessent Shell environment
Experienced in Memory BIST with repair using Tessent MBIST
Experienced with Logic BIST using Tessent Hybrid TK/LBIST
Experience with IJTAG (IEEE 1687), ICL/PDL
Experience performing boundary scan insertion using Tessent Boundary Scan
Experience in ATPG and compression using TestKompress
Experience in scan insertion using Tessent Scan
Experience in the verification leveraging Tessent generated testbenches using Questa and industry standard simulation tools
Experience with tcl scripting
DFT architecture and methodology development is highly desired
RTL design experience is a plus
Strong communication skills are essential
We are an equal opportunity employer and value diversity at our company. We do not
discriminate based on race, religion, color, national origin, sex, gender, gender
expression, sexual orientation, age, marital status, veteran status, or disability status.
A collection of over 377,000 minds building the future, one day at a time in over 200 countries.
We're dedicated to equality, and we welcome applications that reflect the diversity of the
communities we work in. All employment decisions at Siemens are based on qualifications,
merit, and business need. Bring your curiosity and creativity and help us shape tomorrow!
We offer a comprehensive reward package which includes a competitive basic salary, bonus
scheme, generous holiday allowance, pension, and private healthcare.
Let our experts design a Professional CV for you.
