Job Description
Job Details:Job Description:
- Creates bottoms up elements of chip design including but not limited to Device cell and block level layouts, Block level floor plans, abstract view generation, RC extraction and schematic layout verification.
- Debug using phases of physical design development including parasitic extraction ,clock generation, custom polygon editing, auto place and route algorithms, floor planning, full chip assembly, RV DFM Density and verification.
- Troubleshoots design issues and applies proactive intervention.
- May schedule staffing execution and verification of complex chips development and execution of project methodologies and/or flow developments.
Qualifications:- You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing.
- Experience, Skills, Additional qualifications include Proficiency in multiple levels of layout design which includes data path register files and standard cell designs.
- Proficiency in floor planning activities which include FUBunit level assembly routing and integration of custom blocks into the FC floorplan.
- Ability to comprehend issues of RC delay electromigration, selfheating and cross capacitance.
- Ability to recognize failure prone layout structures and proactively contact engineers for guidance and produce electrically robust layout.
Job Type:Intel Contract EmployeeShift:Shift 1 (India)Primary Location: India, BangaloreAdditional Locations:Business group:The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
