Intel Labs, India is looking for a senior expert to lead CPU architecture research.
This Senior Research Leader will drive research projects both internally in collaboration with Intel Business Units as well as externally with top academics at universities world-wide.
This Research Leader will have the opportunity to build and lead a research team to support the research agenda.
Career opportunities, compensation and visibility will be industry leading.
DETAILS:
The Processor Architecture Research (PAR) Lab at Intel Labs leads corporate-wide research into futuristic processor architectures for Intel’s client and server product roadmaps. The Lab is investigating extreme CPU architectures across microarchitecture topics such as mitigating front-end bottlenecks, ML-inspired branch/value predictors, code/data prefetchers, and advanced cache and heterogeneous memory hierarchies.
RESPONSIBILITIES of this PAR Lab Research Leader would include:
Initiates the design, development, execution, and implementation of research projects to fuel growth in Intel's general purpose processor compute architecture and design.
Creating the vision and value proposition in aspects such as power-efficient performance and/or area-efficient CPU performance, aligning technology strategy within the constraints of Intel product architecture and design.
Performs research to define and extend boundaries, create proof-of-concepts, or prototype new ideas.
Invents workload-driven architecture and microarchitecture techniques and models, tunes them through high-fidelity performance and power simulations, and extends their value on the broad universe of general-purpose computing applications of relevance to Intel business.
Works with CPU design teams to determine product requirements and the feasibility of new technology adoption and successfully enables product intercepts year after year.
MINIMUM QUALIFICATIONS:
Candidates must have a PhD or advanced MS in EE/CS from a top University.
10 to 25 years of CPU research and/or product pathfinding and development experience is highly desired either in a world-class graduate school or in the industry.
Strong software expertise in C++/Perl/Python and experience in cycle-accurate (micro)architecture simulators and/or system software (compilers, runtimes, OS).
GOOD TO HAVE:
Expertise in VLSI design and/or accelerator-based (micro)architecture.
Expertise in emerging AI/Cloud workloads characterization and top-down end-to-end workload-driven architecture is desired
Work Model for this Role