General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
HDC Infra IP team delivers DDR IP across multiple product tiers at Qualcomm. Our team is spread across Bangalore, Hyderabad, and Noida sites. We are looking for a strong digital design engineer for the DDR team in Hyderabad.
Skills & Experience
MTech/BTech in EE/CS with 8-12 years of ASIC design experience
Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA
Good understanding of DDR families (LP/PC) and generations (DDR2/3/4/5)
Understanding of protocols like AHB/AXI/ACE/CHI is desirable.
Experience with post-silicon bring-up and debug is a plus.
Able to work with teams across the globe and possess good communication skills
Responsibilities
RTL development and its validation for linting, clock-domain crossing and DFT rules
Work with functional verification team on test-plan development and debug
Develop timing constraints, deliver synthesized netlist to physical design team and provide constraints support for PD STA
UPF writing, power aware equivalence checks and low power checks
DFT insertion and ATPG analysis for optimal SAF, TDF coverage
Provide support to SoC integration and chip level debug
Minimum Qualifications:
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