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الوصف الوظيفي

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY23 and approximately 26,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible. Learn more at www.analog.com and on LinkedIn.


Analog Devices is currently seeking to hire a Digital Micro Architecture and Design Integration Lead with 7-10 years of experience to work in Engineering Enablement group located in Bangalore. As part of dynamic team, you will work with a multi-functional engineering team to develop a range of subsystems, and system solutions for digital processing. You will be intimately involved in pushing the envelope of our digital processing capability as we embrace agile.
Position: Digital Micro Architecture and Design Integration Lead
Experience: 7 to 10 years
Education: Bachelors/Masters engineering degree in Micro-Electronics/Computer Science
Location: Bangalore, India
Job Grade: P4
 
►Responsibilities:
  • Building reusable sub-systems and systems, and drive automation with hands-on contribution during the integration of IP and sub-systems into ADI products
  • Proactive in identifying ways to automate integration sub-systems and systems by abstracting essential IP details
  • Contribute to ASIC digital system architecture, micro architecture, design, verification and implementation domains
  • Continuously improve the development and support model employed on Digital Processing sub-systems to ensure a high level of scalability and efficiency in product engagements
  • Support simulation and silicon verification and validation of sub-systems, test and evaluation of ASIC products and FPGA development systems
  • Actively track and proactively communicate status to team and management using Agile development practices
  • Good automation skills with Python or any other equivalent scripting language
►Minimum Qualifications:
  • Bachelor’s degree in Electrical Engineering, Computer Science, or Computer Engineering with 7+ years experience.
  • Experience leading chip or sub-system architecture and/or digital design
  • Strong engineering background in embedded system design, including ASIC microarchitecture, computer architecture, SoC architecture, and custom or standard DSP or hardware accelerator microarchitecture.
  • A deep understanding of SoC design flow is essential. Should be able to work with the Verification, Synthesis, Physical Design and Timing/Power Analysis teams closely
  • Knowledge of ARM, Tensilica and/or RISC-V processor subsystem architectures, on-chip interconnects, and advanced debug and trace will be extremely beneficial
  • Excellent communication skills, ability to work within a cross-functional, global team

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.


Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.


Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days
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