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الوصف الوظيفي

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you?


We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow.


MED VTL Verification Group

We are seeking a skilled Verification Engineer to join our team. The successful candidate will be responsible for the verification of internally developed VTLs (Veloce-friendly standard protocols such as AMBA, PCIe, SAS, Ethernet, MIPI, etc.) using various standard verification methodologies, including UVM, and ensuring signoff based on coverage matrix.


We are not looking for superheroes, just super minds
  • You’re a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/VLSI from top reputed Engineering colleges with 1-2 years of significant experience in software development. Experience in EDA will be a phenomenal plus.
  • Practical experience with any of the following protocols: AMBA, PCI/PCIe, SAS, Ethernet, MIPI.
  • Experience in IP and SOC level verification.
  • Knowledge of verification methodologies such as Specman, SV, UVM, OVM, TLM, Assertion, Coverage, co-simulation, and co-verification.
  • Good interpersonal skills for working with external interfaces.
  • FPGA/Emulation experience is helpful.
  • Strong scripting and automation knowledge is a significant plus.
Responsibilities:
  1. Develop verification environments using standard verification methodologies for protocols like PCIe, SAS, SATA, etc.
  2. Perform IP-level verification to ensure 100% functional and code coverage.
  3. Suggest and prototype various verification flows using Veloce.
  4. Integrate and qualify various VTLs with Questa-based Verification IPs.
  5. Apply customer use models within internal test suites, which may require interfacing with customers and occasional travel to customer sites. Develop and automate methodology suites.
Join our Digital World!

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.


At Siemens, we are always challenging ourselves to build a better future. We have some of the most inquisitive minds working across the world, re-imagining the future and doing outstanding things.


#LI-EDA

#LI-HYBRID



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