Location: Bangalore, IndiaThales people architect solutions that enable two-thirds of planes to take off and land safely. We create in-flight entertainment systems that engross 50 million fliers every year and we develop the avionics that control the world’s largest commercial aircrafts. Our simulators train the next generation of pilots for fighter jets, transporters and search and rescue helicopters. And, together, each and every member of our aerospace team makes a difference.Present in India since 1953, Thales is headquartered in Noida, Uttar Pradesh, and has operational offices and sites spread across Bengaluru, Delhi, Gurugram, Hyderabad, Mumbai, Pune among others. Over 1800 employees are working with Thales and its joint ventures in India. Since the beginning, Thales has been playing an essential role in India’s growth story by sharing its technologies and expertise in Defence, Transport, Aerospace and Digital Identity and Security markets.
FPGA Firmware Principal Engineer
Thales India Engineering Competency Center in Bangalore is seeking Principal Engineer role to be part of Hardware engineering team. In this role you will be responsible for developing FPGA firmware, RTL design, testing in the virtual environment and in the target hardware for Avionics/defense applications. You also perform trade analysis of different algorithms, IP core development, design approaches, engineering simulations & modeling before finalizing the design.
Qualifications:
B.Tech/Master in Electronics & Communication or Electrical engineering or equivalent with 15+ years of relevant experience.
Higher qualifications of Post-graduation and PhD are desirable. Working experience in Aerospace/Defense products development is desirable
Job Responsibilities:
Should have proven experience as an FPGA architect, having been involved in all phases of development from specification to coding, implementation, integration, and verification of FPGAs for Aerospace/defense applications
Should have strong experience in Requirements Capture, PHAC, IVV Plan and Configuration traceability matrix.
Should have strong and hands on experience in VHDL and Verilog language.
Strong experience in implementing FPGA code on the target hardware & testing with other system components and software.
Strong experience in Synthesis, P&R, code constrain creation and timing closure of various design IP’s into FPGAs. Designer test bench, Timing simulation.
Strong experience in functional and timing verification of FPGA design using simulation
Strong experience in In-system verification of FPGA design on the system
Strong experience in Writing verification test benches and automation of test cases
Should have a good understanding of various development practices (data management, traceability, configuration management, requirements management) and familiarity with the Thales DDQS development process
Should have experience to work in a collaborative spirit, enjoy challenges and teamwork, and have strong listening, analysis, and synthesis skills in a multidisciplinary environment
Should have expertise in interacting and working with cross-functional teams Ex: board development (interfaces, timing issues, etc.)
Must be aware with Ethernet, PCIe, ARINC 429, RS-485/422, RS-232, MILSTD 1553, LVDS/Video interfaces etc.
Must be experience using Revision Control Systems: Subversion (SVN), CVS, Git
Good to be experience using scripting languages: Make, Perl, Python, shell scripts, etc.
Should be able to provide progress/technical updates to the program and project managers.
Should be able to support project schedule/plan, risk/opportunity management and configuration management.
Should be able to mentor other team members inside the team.
Should assures(insures) the good level of reporting of his activity profession to assure(insure) a piloting adapted by the activities
Minimum Skills/Experience:
Preferable master's degree qualified in electrical/electronic engineering with minimum 15 years of experience in FPGA Design & Verification.
Preferred candidate has experience in FPGA development for Avionics/Defense Applications.
Experience in FPGA Implementation Tools ( XILINX Vivado/ALTERA Libero SoC /Altera Quartus).
Good Experience in Mentor Graphics tools (HDL Designer, Questasim, Quest CDC, and Formal Pro).
Experience in handling Lab equipment's (Logic Analyzer, Oscilloscope, Function Generators, JTAG, and In-circuit de-buggers).
Various development practices - data management, traceability, configuration management, requirements management.
Experience in DO-254 Process assurance.
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