General Summary:
The candidate would be joining a team with deep expertise in designing IP for wireless sub-systems for market leading products. In this role, the candidate would be working on connectivity solutions for mobile phones, wearables, IOT and Mobile Infrastructure chips. The candidate would be a part of Bluetooth IP Design team and will be involved in IP and sub-system development. The role requires working on the latest technology nodes on all aspects of the VLSI development cycle: architecture, micro architecture, RTL design and integration. Close interactions with system architecture, verification, SoC Design, Validation, Synthesis & PD teams are required for design convergence.
Skills/Experience
2-6 years of experience in the design of complex ASICs
Strong expertise in RTL coding of complex designs using Verilog/SV
Exposure to low power design methodology and designs with multiple clock domains
Strong debugging, analytical skills and strong communication skills, both verbal and written
Hands-on experience in front-end design tools.
Minimum Qualifications:
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