NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionised parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing.
Today, our GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible for our environment. The NVIDIA System-On-Chip (SOC) group is seeking a top ASIC Verification Engineer. You should have a real passion for verification methodologies and implementation that enable high-quality system-level IP design and robust verification at multiple environment levels (e.g., unit, sub-system, and SOC).
What you'll be doing:
Be an integral part of the Clocks team, defining and developing methods to deliver performance on the industry's leading SOCs.
Develop test plans, tests, and verification methodologies to verify the microarchitecture and design.
Craft and build new test benches and testbench components in System Verilog, C and Python.
Work with architects, designers, and SW engineers to accomplish your tasks.
What we need to see:
B.Tech (or) M.Tech in Electronics or VLSI domain.
A proven track record with 2+ years of meaningful experience in Frontend ASIC verification.
Experience in crafting test bench environments for unit and system-level verification.
Strong coding skills in Perl, Python, or other industry-standard scripting languages.
Excellent debugging and analytical skills.
Have exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB, xprop).
Good understanding of RTL design (System Verilog) and Architecture.
Prior experience in Clocks/Resets/Power management verification is plus.
Experience in UVM is a plus.
Great written, oral, and interpersonal skills with the curiosity to work with a team on rare challenges
With great culture, competitive salaries, and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're a creative and autonomous engineer with a passion for technology, we want to hear from you!